7. I/O
Three techniques are possible for I/O operations:
Programmed I/O
Data are exchanged between the processor and the I/O module
Processor executes a program that gives it direct control of the I/O operation
When the processor issues a command it must wait until the I/O operation is complete
If the processor is faster than the I/O module this is wasteful of processor time

Interrupt-driven I/O
Processor issues an I/O command, continues to execute other instructions, and is interrupted by the I/O module when the latter has completed its work


Direct memory access (DMA)
The I/O module and main memory exchange data directly without processor involvement

I/O Mapping
Memory mapped I/O
There is a single address space for memory locations and I/O devices
A single read line and a single write line are needed on the bus
Devices and memory share an address space I/O looks just like memory read/write
No special commands for I/O
Large selection of memory access commands available

Isolated I/O
Separate address spaces
Need I/O or memory select lines
Special commands for I/O
Limited set

Q
In what circumstances that a modem can become an I/O device?
NIC
List all the factors that may affect the performance of an I/O of a system.
I/O Technique
Bus System
List and explain briefly the principle I/O techniques.
Programmed I/O - data exchanged between the processor and the I/O module. The processor executes a program that gives it direct control of the I/O operation, including sensing device status, sending a read or write command, and transferring the data
Interrupt-driven I/O - processor issues I/O command, then goes off to do other things until the I/O module interrupts the processor to request service when it is ready to exchange data with the processor
Direct Memory Access - involves an additional module on the system bus. The DMA module is capable of mimicking the processor, and, indeed, of taking over control of the system from the processor
What is the difference between memory-mapped I/O and isolated I/O?
Sharing memory location between processor and I/O or not
Memory mapped I/O
Devices and memory share an address space I/O looks just like memory read/write
No special commands for I/O
Large selection of memory access commands available
Isolated I/O
Separate address spaces
Need I/O or memory select lines
Special commands for I/O Limited set
When a device interrupt occurs, how does the processor determine which device issued the interrupt?
multiple interrupt lines
software poll
daisy chain(hardware poll,vectored)
bus arbitration(vectored)
When a DMA module takes control of a bus, and while it retains control of the bus what does the processor do?
The processor pauses for each bus cycle stolen by DMA module
The processor either doesn't need to use the bus at the time, or it is forced to suspend operation temporarily, The processor deals with other things, while the bus operation is left to DMA
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